FIGS. 9(a) and 9(b) are diagrams showing a prior art semiconductor device in which high frequency GaAs chips are mounted on a silicon substrate on which an IC pattern is formed. While it is advantageous to constitute a circuit employing a GaAs substrate in view of high speed operation, it is disadvantageous in view of production cost because a GaAs substrate is expensive. Therefore, in general, after a high frequency circuit in which high speed operation is generally required is produced with the GaAs substrate, and other circuits are produced employing a silicon substrate, these combined circuits are fabricated. More particularly, as shown in FIG. 9(a), on the surface of a silicon substrate 1 on which IC patterns such as a memory circuit and wiring are formed, chip die bonding grooves 11 are formed so that a surface of a GaAs chip 6 and a surface of the silicon substrate 1 are at the same level at die bonding of the GaAs chip 6. This GaAs chip 6 is die-bonded in the die bonding groove 11 by solder or the like, and this GaAs chip 6 is connected by a wire 20 to a transmission line 19 formed on the silicon substrate 1. As described above, by packaging the GaAs chip 6 in a concaved part of the substrate 1, the length of the wire 20 connecting the transmission line 19 on the side of the silicon substrate 1 to the GaAs chip 6 is shortened, reducing reflection of high frequency signals.
FIG. 9(b) is a portion of a cross section taken along a line in the longitudinal direction of FIG. 9(a). A grounding line 21 is formed on the rear surface of the substrate 1 in which the die bonding groove 11 is formed, and the grounding line 21 is electrically connected to the rear surface of the GaAs chip 6 through a via hole 22 which is formed in the substrate 1. The characteristic impedance of the transmission line 19 produced on the surface of the silicon substrate 1 is determined by such parameters as the dielectric constant .epsilon.r and thickness t of the substrate 1, the width W of the transmission line 19 or the like. Thus, a GaAs chip-on Si IC 80 makes the function of ICs formed on the silicon substrate 1 and the function of the GaAs chip 6 complex.
Further, when sealing a semiconductor device operating at high frequencies such as a GaAs chip or a GaAs chip-on Si substrate, if a dielectric resin material adheres to the pattern of the chip, deterioration in high frequency characteristics occurs, in that the wavelength of a high frequency signal generated in the device varies and deviates from the design value or the dielectric loss increases. In order to prevent this deterioration, the chips are sealed in a hollow package, as illustrated in FIG. 10. In other words, the semiconductor device 80 is encapsulated in a package body 23 which is designed according to the configuration of the semiconductor device 80, an external lead 25 fixed to the package body 23 is connected to an electrode of the semiconductor device 80 with a wire or the like, so as to exchange signals between the semiconductor device 80 and the outside of the package, and the semiconductor device 80 is sealed by fixing a cap material 24 to the package body 23.
In the prior art semiconductor device is constructed as described above, the silicon substrate with high frequency IC chips thereon, is required to have a high insulating property to achieve a resistivity over several K.OMEGA./cm and to reduce loss in transmitting high frequency signals. Therefore, a more expensive silicon substrate having a higher purity than a conventional silicon wafer must be employed, resulting in a high cost. In addition, the hollow package employed for packaging the high frequency IC chip is not widely used, and is specially designed for each chip, resulting in extraordinarily high production cost relative to a case of employing plastic sealing.